Discover the intricacies of processor design with Go_emu, a terminal-based RISC-V emulator. Designed for academic exploration, this project allows you to execute bare metal RISC-V code using the Go language, providing an interactive way to learn about pipeline architecture and instruction set design, without the complexity of competitive models.
Go_emu is an innovative emulator developed in Go language that simulates a RISC-V 5-stage pipeline. Designed primarily for educational purposes, this project facilitates a deeper understanding of the RISC-V architecture, instruction set architecture (ISA), and processor design principles. Users can execute bare metal RISC-V rv32i compiled ROMs and visualize the output directly within a terminal interface, allowing for an interactive and intuitive learning experience.
Key Features
- Terminal-Based Display: Experience a straightforward, yet effective way to visualize processor operations and output.
- Academic Focus: Built with the intention of learning rather than competing, Go_emu serves as a practical tool for anyone interested in RISC-V and processor design.
Demonstration
Resources for Learning
To aid your exploration of RISC-V and its underlying principles, Go_emu utilizes a variety of foundational resources, including:
Dive into Go_emu to enhance your understanding of modern processor architectures using Go language.